Vita

Nusrat Jahan Lisa is Research Associate in the Chair for Database Technology and the Chair for Processor Design at Technische Universität Dresden (TU Dresden), Germany. She received her Bachelor of Science in Computer Science and Engineering from Ahsanullah University of Science and Technology, Bangladesh and Master of Science in Computer Science and Engineering from United International University, Bangladesh. She was a Lecturer from October, 2008 to September 2011, later promoted to Assistant Professor form October, 2011 to September, 2016 in the Department of Computer Science and Engineering at Ahsanullah University of Science and Technology (AUST), Bangladesh.

 

Research Interests

  • Hardware Software Co-Design Systems
  • Re-configurable/Adaptable Architectures
  • Custom Accelerator Based System

 

Research Platforms /  Bibliography website

Publications (4)

  • High-Throughput BitPacking Compression.

    Jahan, N.; Tuan, N.; Habich, D.; Kumar, A.; Lehner, W.

    In 22nd Euromicro Conference on Digital System Design.DSD 2019, Kallithea, Greece.643-646,2019.

    @conference{,
       author = {Nusrat Lisa Jahan and Nguyen Duy Anh Tuan and Dirk Habich and Akash Kumar and Wolfgang Lehner},
       title = {High-Throughput BitPacking Compression},
       booktitle = {22nd Euromicro Conference on Digital System Design},
       year = {2019},
       month = {8},
       location = {Kallithea, Greece},
       pages = {643--646},
       numpages = {4},
       url = {https://doi.org/10.1109/DSD.2019.00101}
    }

  • FPGA vs. SIMD: Comparison for Main Memory-Based Fast Column Scan.

    Jahan, N.; Ungethüm, A.; Habich, D.; Lehner, W.; Tuan, N.; Kumar, A.

    In Data Management Technologies and Applications.Volume 862,24 pages.Springer International Publishing,116-140,2019.ISBN: 978-3-030-26636-3.

    @book{,
       author = {Nusrat Lisa Jahan and Annett Ungeth\"{u}m and Dirk Habich and Wolfgang Lehner and Nguyen Duy Anh Tuan and Akash Kumar},
       title = {FPGA vs. SIMD: Comparison for Main Memory-Based Fast Column Scan},
       booktitle = {Data Management Technologies and Applications},
       volume = {862},
       year = {2019},
       month = {7},
       isbn = {978-3-030-26636-3},
       pages = {116--140},
       numpages = {24},
       publisher = {Springer International Publishing}
    }

  • Column Scan Acceleration in Hybrid CPU-FPGA Systems.

    Jahan, N.; Ungethüm, A.; Habich, D.; Lehner, W.; Tuan, N.; Kumar, A.

    ADMS 2018, Rio De Janeiro, Brazil .22-33,2018.

    @conference{,
       author = {Nusrat Lisa Jahan and Annett Ungeth\"{u}m and Dirk Habich and Wolfgang Lehner and Nguyen Duy Anh Tuan and Akash Kumar},
       title = {Column Scan Acceleration in Hybrid CPU-FPGA Systems.},
       year = {2018},
       month = {8},
       location = {Rio De Janeiro, Brazil },
       pages = {22--33},
       numpages = {12},
       crossref = {DBLP:conf/vldb/2018adms}
    }

  • Column Scan Optimization by Increasing Intra-Instruction Parallelism.

    Jahan, N.; Ungethüm, A.; Habich, D.; Tuan, N.; Kumar, A.; Lehner, W.

    DATA 2018, Porto, Portugal.344-353,2018.

    @conference{,
       author = {Nusrat Lisa Jahan and Annett Ungeth\"{u}m and Dirk Habich and Nguyen Duy Anh Tuan and Akash Kumar and Wolfgang Lehner},
       title = {Column Scan Optimization by Increasing Intra-Instruction Parallelism.},
       year = {2018},
       month = {7},
       location = {Porto, Portugal},
       pages = {344--353},
       numpages = {10},
       url = {10.5220/0006897003440353},
       crossref = {DBLP:conf/data/2018}
    }