Best Paper Award@DATA 2018

We are happy to announce that our paper „Column Scan Optimization by Increasing Intra-Instruction Parallelism“ written by Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Nguyen Duy Anh Tuan, Akash Kumar, and Wolfgang Lehner has been awarded with the Best Paper of the 2018 DATA conference in Porto, Portugal.

Hinweise zur Prüfung “Datenbanken – Grundlagen”

Hinweise zur Prüfung “Datenbanken – Grundlagen”, insbesondere die Raumzuordnung finden Sie hier.

Paper@ISITA 2018

We are delighted to announce that our paper „Lower Bound-oriented Parameter Calculation for AN coding“ written by Juliana Hildebrandt, Till Kolditz, Dirk Habich, and Wolfgang Lehner has been accepted at the International Symposium on Information Theory and Its Applications (ISITA). ISITA is the leading conference on information theory.

 

Abstract: The hardware as well as software communities have recently experienced a shift towards mitigating bit flips issues in software, rather than completely mitigating only in hardware. For this software error mitigation, arithmetic error coding schemes like AN coding are increasingly applied because arithmetic operations can be directly executed without decoding and bit flip detection is provided in an end-to-end fashion. In this case, the encoded data words are computed by multiplying a constant integer value A onto each original data word. To reliably detect b bit flips in each code word, the value A has to be well-chosen, so that a minimum Hamming distance of b+1 can be guaranteed. However, the value A depends on the data word length as well as on the desired minimum Hamming distance. Up to now, a very expensive brute force approach for computation of the value for A is applied. To tackle that in a more efficient way, we present a lower bound-oriented approach for this calculation in this paper. 

Paper@ADMS 2018

We are happy to announce that our joint paper with the processor design group of Akash Kumar has been accepted at the ninth International Workshop on Accelerating Analytics and Data Management Systems Using Modern Processor and Storage Architectures (co-located to VLDB). The paper presents a column scan accleration approach for hybrid CPU-FPGA systems.